Bruce Nelson

Bob Sproull

Most books about continuous and process improvement are written in a textbook format with straightforward information and plenty of graphs and charts to convey the points being made. Sometimes, even the best step-by-step instructions can escape even the most adamant of followers for an improvement method in determining exactly how to apply what they’ve learned. Taking a different approach, Focus and Leverage is presented in an engaging business-novel format and is a sequel to the authors’ bestselling book, Epiphanized, Second Edition. The primary characters remain the same, but this time the storyline features two different industries: Maintenance, Repair, and Overhaul (MRO) and Healthcare (hospital) environments. This book expands and highlights the two improvement methods first introduced in the appendix section of Epiphanized: the Interference Diagram (ID)/Intermediate Objectives (IO) map (ID/IO Simplified Strategy) and Multiple-Drum-Buffer-Rope (M-DBR). Both of these innovative methods are the result of some much-focused thinking that allows for multiple improvement methods, and steps, to be combined into a single thinking process tool. This groundbreaking new method is designed to save time and money and allows faster and better results to be achieved. The two storylines move the reader through the necessary system analysis, problem identification, and solution implementation. The novel format aids in presenting several realistic situational discussions as well as a multitude of graphs and figures to explain the step-by-step process for success. The storyline of this book weaves some well-known and some not-so-well-known thinking tools into the problem-solving sphere to provide you with an understanding of how to first discover and then overcome issues not readily known or expected at the start of any project.

The Critical Methodology for Theory of Constraints, Lean, and Six Sigma (TLS)

Focus and Leverage

David Harris

Robert F. Sproull

Ivan Sutherland

Professor Emeritus David Harris

Designers of high-speed integrated circuits face a bewildering array of choices and too often spend frustrating days tweaking gates to meet speed targets. Logical Effort: Designing Fast CMOS Circuits makes high speed design easier and more methodical, providing a simple and broadly applicable method for estimating the delay resulting from factors such as topology, capacitance, and gate sizes. The brainchild of circuit and computer graphics pioneers Ivan Sutherland and Bob Sproull, "logical effort" will change the way you approach design challenges. This book begins by equipping you with a sound understanding of the method's essential procedures and concepts-so you can start using it immediately. Later chapters explore the theory and finer points of the method and detail its specialized applications. Features Explains the method and how to apply it in two practically focused chapters. Improves circuit design intuition by teaching simple ways to discern the consequences of topology and gate size decisions. Offers easy ways to choose the fastest circuit from among an array of potential circuit designs. Reduces the time spent on tweaking and simulations-so you can rapidly settle on a good design. Offers in-depth coverage of specialized areas of application for logical effort: skewed or unbalanced gates, other circuit families (including pseudo-NMOS and domino), wide structures such as decoders, and irregularly forking circuits. Presents a complete derivation of the method-so you see how and why it works.

Bob Sproull

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