Jean-Luc Gaudiot

Guang R. Gao

Lubomir Bic

The book includes papers on massively parallel distributed memory and multithreaded architecture design, synchronization and pipelined design, and superpipelined data-driven VLSI processors. Other sections discuss stream data types, the development of well-structured software, and parallelization of dataflow programs.

Advanced Topics in Dataflow Computing and Multithreading

Laurence T. Yang

Minyi Guo

Niraj K. Jha

This book constitutes the refereed proceedings of the International Conference on Embedded and Ubiquitous Computing, EUC 2004, held in Aizu-Wakamatsu City, Japan, in August 2004. The 104 revised full papers presented were carefully reviewed and selected from more than 260 submissions. The papers are organized in topical sections on embedded hardware and software; real-time systems; power-aware computing; hardware/software codesign and systems-on-chip; mobile computing; wireless communication; multimedia and pervasive computing; agent technology and distributed computing, network protocols, security, and fault-tolerance; and middleware and peer-to-peer computing.

EUC 2004

Hermann Kopetz

Achim Rettberg

Bernd Kleinjohann

Lisa Kleinjohann

The IFIP TC-10 Working Conference on Distributed and Parallel Embedded Systems (DIPES 2004) brings together experts from industry and academia to discuss recent developments in this important and growing field in the splendid city of Toulouse, France. The ever decreasing price/performance ratio of microcontrollers makes it economically attractive to replace more and more conventional mechanical or electronic control systems within many products by embedded real-time computer systems. An embedded real-time computer system is always part of a well-specified larger system, which we call an intelligent product. Although most intelligent products start out as stand-alone units, many of them are required to interact with other systems at a later stage. At present, many industries are in the middle of this transition from stand-alone products to networked embedded systems. This transition requires reflection and architecting: The complexity of the evolving distributed artifact can only be controlled, if careful planning and principled design methods replace the - hoc engineering of the first version of many standalone embedded products.

IFIP 18th World Computer Congress, TC10 Working Conference on Distributed and Parallel, Embedded Systems (DIPES 2004), 22–27 August, 2004 Toulouse, France

Design Methods and Applications for Distributed Embedded Systems

This monograph evolved from my Ph. D dissertation completed at the Laboratory of Computer Science, MIT, during the Summer of 1986. In my dissertation I proposed a pipelined code mapping scheme for array operations on static dataflow architectures. The main addition to this work is found in Chapter 12, reflecting new research results developed during the last three years since I joined McGill University-results based upon the principles in my dissertation. The terminology dataflow soft ware pipelining has been consistently used since publication of our 1988 paper on the argument-fetching dataflow architecture model at McGill University [43]. In the first part of this book we describe the static data flow graph model as an operational model for concurrent computation. We look at timing considerations for program graph execution on an ideal static dataflow computer, examine the notion of pipe lining, and characterize its performance. We discuss balancing techniques used to transform certain graphs into fully pipelined data flow graphs. In particular, we show how optimal balancing of an acyclic data flow graph can be formulated as a linear programming problem for which an optimal solution exists. As a major result, we show the optimal balancing problem of acyclic data flow graphs is reduceable to a class of linear programming problem, the net work flow problem, for which well-known efficient algorithms exist. This result disproves the conjecture that such problems are computationally hard.

A Code Mapping Scheme for Dataflow Software Pipelining

Welcome to the proceedings of the 2004 International Conference on Embedded and Ubiquitous Computing (EUC 2004) which was held in Aizu-Wakamatsu City, Japan, 25–27 August 2004. Embedded and ubiquitous computing are emerging rapidly as exciting new paradigms and disciplines to provide computing and communication services all the time, everywhere. Its systems are now invading every aspect of life to the point that they are disappearing inside all sorts of appliances or can be worn unobtrusively as part of clothing and jewelry, etc. This emergence is a natural outcome of research and technological advances in embedded systems, pervasive computing and communications, wireless networks, mobile computing, distri- ted computing and agent technologies, etc. Its explosive impact on academia, industry, government and daily life can be compared to that of electric motors over the past century but promises to revolutionize life much more profoundly than elevators, electric motors or even personal computer evolution ever did. The EUC 2004 conference provided a forum for engineers and scientists in academia, industry, and government to address all the resulting profound ch- lenges including technical, safety, social, legal, political, and economic issues, and to present and discuss their ideas, results, work in progress and experience on all aspects of embedded and ubiquitous computing. There was a very large number of paper submissions (260) from more than 20countriesandregions,includingnotonlyAsiaandthePaci?c,butalsoEurope and North America. All submissions were reviewed by at least three program or technical committee members or external reviewers.

International Conference EUC 2004, Aizu-Wakamatsu City, Japan, August 25-27, 2004, Proceedings

Embedded and Ubiquitous Computing

Robert A. Iannucci

Robert H. Halstead Jr.

Burton Smith

Multithreaded computer architecture has emerged as one of the most promising and exciting avenues for the exploitation of parallelism. This new field represents the confluence of several independent research directions which have united over a common set of issues and techniques. Multithreading draws on recent advances in dataflow, RISC, compiling for fine-grained parallel execution, and dynamic resource management. It offers the hope of dramatic performance increases through parallel execution for a broad spectrum of significant applications based on extensions to `traditional' approaches. Multithreaded Computer Architecture is divided into four parts, reflecting four major perspectives on the topic. Part I provides the reader with basic background information, definitions, and surveys of work which have in one way or another been pivotal in defining and shaping multithreading as an architectural discipline. Part II examines key elements of multithreading, highlighting the fundamental nature of latency and synchronization. This section presents clever techniques for hiding latency and supporting large synchronization name spaces. Part III looks at three major multithreaded systems, considering issues of machine organization and compilation strategy. Part IV concludes the volume with an analysis of multithreaded architectures, showcasing methodologies and actual measurements. Multithreaded Computer Architecture: A Summary of the State of the Art is an excellent reference source and may be used as a text for advanced courses on the subject.

Guang R. Gao

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