Nuno Horta

Nuno Lourenço

Ricardo Martins

This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-aware circuit sizing. The discussion includes different methods for automatic placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. All the methods described are applied to practical examples for a 130nm design process, as well as placement and routing benchmark sets.

Placement, Routing and Parasitic Extraction Techniques

Analog Integrated Circuit Design Automation

Rafael Vieira

Ricardo Póvoa

This book consists of the research, design and implementation, from sizing to layout with parasitic extraction and yield estimation, of a low-power, low-noise amplifier for biomedical and healthcare applications of bio-potential signals, particularly focusing on the electromyography and electrooculography. These signals usually operate in different broadbands, yet follow an impulse-shape transmission, hence being suitable to be applied and detected by the same receiver.

Tunable Low-Power Low-Noise Amplifier for Healthcare Applications

Ricardo Lourenço

This work addresses the research and development of an innovative optimization kernel applied to analog integrated circuit (IC) design. Particularly, this works describes the modifications inside the AIDA Framework, an electronic design automation framework fully developed by at the Integrated Circuits Group-LX of the Instituto de Telecomunicações, Lisbon. It focusses on AIDA-CMK, by enhancing AIDA-C, which is the circuit optimizer component of AIDA, with a new multi-objective multi-constraint optimization module that constructs a base for multiple algorithm implementations. The proposed solution implements three approaches to multi-objective multi-constraint optimization, namely, an evolutionary approach with NSGAII, a swarm intelligence approach with MOPSO and stochastic hill climbing approach with MOSA. Moreover, the implemented structure allows the easy hybridization between kernels transforming the previous simple NSGAII optimization module into a more evolved and versatile module supporting multiple single and multi-kernel algorithms. The three multi-objective optimization approaches were validated with CEC2009 benchmarks to constrained multi-objective optimization and tested with real analog IC design problems. The achieved results were compared in terms of performance, using statistical results obtained from multiple independent runs. Finally, some hybrid approaches were also experimented, giving a foretaste to a wide range of opportunities to explore in future work.

AIDA-CMK: Multi-Algorithm Optimization Kernel Applied to Analog IC Sizing

This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.

Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

António Gusmão

In this book, innovative research using artificial neural networks (ANNs) is conducted to automate the placement task in analog integrated circuit layout design, by creating a generalized model that can generate valid layouts at push-button speed. Further, it exploits ANNs’ generalization and push-button speed prediction (once fully trained) capabilities, and details the optimal description of the input/output data relation. The description developed here is chiefly reflected in two of the system’s characteristics: the shape of the input data and the minimized loss function. In order to address the latter, abstract and segmented descriptions of both the input data and the objective behavior are developed, which allow the model to identify, in newer scenarios, sub-blocks which can be found in the input data. This approach yields device-level descriptions of the input topology that, for each device, focus on describing its relation to every other device in the topology. By means of these descriptions, an unfamiliar overall topology can be broken down into devices that are subject to the same constraints as a device in one of the training topologies. In the experimental results chapter, the trained ANNs are used to produce a variety of valid placement solutions even beyond the scope of the training/validation sets, demonstrating the model’s effectiveness in terms of identifying common components between newer topologies and reutilizing the acquired knowledge. Lastly, the methodology used can readily adapt to the given problem’s context (high label production cost), resulting in an efficient, inexpensive and fast model.

Analog IC Placement Generation via Neural Networks from Unlabeled Data

Penousal Machado

Luís Paquete

Anne Auger

Carlos M. Fonseca

Darrell Whitley

This two-volume set LNCS 11101 and 11102 constitutes the refereed proceedings of the 15th International Conference on Parallel Problem Solving from Nature, PPSN 2018, held in Coimbra, Portugal, in September 2018. The 79 revised full papers were carefully reviewed and selected from 205 submissions. The papers cover a wide range of topics in natural computing including evolutionary computation, artificial neural networks, artificial life, swarm intelligence, artificial immune systems, self-organizing systems, emergent behavior, molecular computing, evolutionary robotics, evolvable hardware, parallel implementations and applications to real-world problems. The papers are organized in the following topical sections: numerical optimization; combinatorial optimization; genetic programming; multi-objective optimization; parallel and distributed frameworks; runtime analysis and approximation results; fitness landscape modeling and analysis; algorithm configuration, selection, and benchmarking; machine learning and evolutionary algorithms; and applications. Also included are the descriptions of 23 tutorials and 6 workshops which took place in the framework of PPSN XV.

15th International Conference, Coimbra, Portugal, September 8–12, 2018, Proceedings, Part I

Parallel Problem Solving from Nature – PPSN XV

Ting Hu

Federico Divina

Eric Medvet

This book constitutes the refereed proceedings of the 23rd European Conference on Genetic Programming, EuroGP 2020, held as part of Evo*2020, in Seville, Spain, in April 2020, co-located with the Evo*2020 events EvoCOP, EvoMUSART and EvoApplications. The 12 full papers and 6 short papers presented in this book were carefully reviewed and selected from 36 submissions. The papers cover a wide spectrum of topics, including designing GP algorithms for ensemble learning, comparing GP with popular machine learning algorithms, customising GP algorithms for more explainable AI applications to real-world problems.

Nuno Lourenço

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