Paolo Faraboschi

Joseph A. Fisher

Clifford Young

The fact that there are more embedded computers than general-purpose computers and that we are impacted by hundreds of them every day is no longer news. What is news is that their increasing performance requirements, complexity and capabilities demand a new approach to their design. Fisher, Faraboschi, and Young describe a new age of embedded computing design, in which the processor is central, making the approach radically distinct from contemporary practices of embedded systems design. They demonstrate why it is essential to take a computing-centric and system-design approach to the traditional elements of nonprogrammable components, peripherals, interconnects and buses. These elements must be unified in a system design with high-performance processor architectures, microarchitectures and compilers, and with the compilation tools, debuggers and simulators needed for application development. In this landmark text, the authors apply their expertise in highly interdisciplinary hardware/software development and VLIW processors to illustrate this change in embedded computing. VLIW architectures have long been a popular choice in embedded systems design, and while VLIW is a running theme throughout the book, embedded computing is the core topic. Embedded Computing examines both in a book filled with fact and opinion based on the authors many years of R&D experience. · Complemented by a unique, professional-quality embedded tool-chain on the authors' website, http://www.vliw.org/book · Combines technical depth with real-world experience · Comprehensively explains the differences between general purpose computing systems and embedded systems at the hardware, software, tools and operating system levels. · Uses concrete examples to explain and motivate the trade-offs.

A VLIW Approach to Architecture, Compilers and Tools

Embedded Computing

Xavier Martorell

Yale N. Patt

Pierfrancesco Foglia

Evelyn Duesterwald

Message from the General Co-chairs It is our honor and pleasure as General Co-chairs to welcome you to the p- ceedings of HiPEAC 2010 which was held in Pisa. This was the ?fth HiPEAC conference, following in the strong tradition of the ?rst conference in Barcelona in 2005 and the subsequent conferences in Ghent (2007), Goteborg (2008), and Paphos (2009). HiPEAC2010o?eredarichanddiversesetoftechnicalandnon-technical- tivities. The technical activities included most importantly another strong te- nical program, and in addition, eight workshops and ?ve tutorials, all central to the HiPEAC network roadmap. The workshops explored multi-cores, simu- tion and performance evaluation, compiler and optimizations, design reliability, recon?gurable computing, interconnection networks,operating system and c- puter architecture codesign. The tutorials dealt with statistical methodology to evaluate program speed-ups, design for reliability, how to teach introductory computer architecture and programming, programming FPGA-based accele- tors and adaptability. We were particularly fortunate to have two keynote addresses, one by Bob Iannucci, formerly from Nokia, on how data center thinking can be e?ectively ushered into the embedded system domain, and one by Roger Espasa from Intel on the Larrabee Architecture. The non-technical activities re?ected the academic, historical, and cultural charm of Pisa, a major center of Tuscany, and we hope the participants took advantage of our scheduled guided tour of historical Pisa and the conference banquet in a historic villa.

5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010, Proceedings

High Performance Embedded Architectures and Compilers

Paolo Faraboschi

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