Debdeep Mukhopadhyay

Willi Meier

This book constitutes the refereed proceedings of the 15th International Conference on Cryptology in India, INDOCRYPT 2014, held in New Delhi, India, in December 2014. The 25 revised full papers presented together with 4 invited papers were carefully reviewed and selected from 101 submissions. The papers are organized in topical sections on side channel analysis; theory; block ciphers; cryptanalysis; efficient hardware design; protected hardware design; elliptic curves.

15th International Conference on Cryptology in India, New Delhi, India, December 14-17, 2014, Proceedings

Progress in Cryptology -- INDOCRYPT 2014

SIKHAR PATRANABIS

This book uses motivating examples and real-life attack scenarios to introduce readers to the general concept of fault attacks in cryptography. It offers insights into how the fault tolerance theories developed in the book can actually be implemented, with a particular focus on a wide spectrum of fault models and practical fault injection techniques, ranging from simple, low-cost techniques to high-end equipment-based methods. It then individually examines fault attack vulnerabilities in symmetric, asymmetric and authenticated encryption systems. This is followed by extensive coverage of countermeasure techniques and fault tolerant architectures that attempt to thwart such vulnerabilities. Lastly, it presents a case study of a comprehensive FPGA-based fault tolerant architecture for AES-128, which brings together of a number of the fault tolerance techniques presented. It concludes with a discussion on how fault tolerance can be combined with side channel security to achieve protection against implementation-based attacks. The text is supported by illustrative diagrams, algorithms, tables and diagrams presenting real-world experimental results.

Fault Tolerant Architectures for Cryptography and Hardware Security

Rajat Subhra Chakraborty

Beginning with an introduction to cryptography, Hardware Security: Design, Threats, and Safeguards explains the underlying mathematical principles needed to design complex cryptographic algorithms. It then presents efficient cryptographic algorithm implementation methods, along with state-of-the-art research and strategies for the design of very large scale integrated (VLSI) circuits and symmetric cryptosystems, complete with examples of Advanced Encryption Standard (AES) ciphers, asymmetric ciphers, and elliptic curve cryptography (ECC). Gain a Comprehensive Understanding of Hardware Security—from Fundamentals to Practical Applications Since most implementations of standard cryptographic algorithms leak information that can be exploited by adversaries to gather knowledge about secret encryption keys, Hardware Security: Design, Threats, and Safeguards: Details algorithmic- and circuit-level countermeasures for attacks based on power, timing, fault, cache, and scan chain analysis Describes hardware intellectual property piracy and protection techniques at different levels of abstraction based on watermarking Discusses hardware obfuscation and physically unclonable functions (PUFs), as well as Trojan modeling, taxonomy, detection, and prevention Design for Security and Meet Real-Time Requirements If you consider security as critical a metric for integrated circuits (ICs) as power, area, and performance, you’ll embrace the design-for-security methodology of Hardware Security: Design, Threats, and Safeguards.

Design, Threats, and Safeguards

Hardware Security

Behrouz A Forouzan

This revised third edition presents the subject with the help of learning objectives (LO) guided by Bloom's Taxonomy and supports outcome-based learning. It discusses concepts from elementary to advanced levels with focus on mathematical preliminaries. Numerous solved examples, algorithms, illustrations & usage of fictitious characters make the text interesting and simple to read. Salient Features: Dedicated section on Elementary Mathematics Pseudo codes used to illustrate implementation of algorithm Includes new topics on Shannon's theory and Perfect Secrecy, Unicity Distance and Redundancy of Language Interesting elements introduced through QR codes - Solutions to select chapter-end problems (End of every chapter) - 19 Proofs of theorems (Appendix Q) - Secured Electronic Transaction (Appendix R) Enhanced Pedagogical Features: - Solved Examples: 260 - Exercises: 400 - Review Questions: 200 - Illustration: 400

Debdeep Mukhopadhyay

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